
    gi              	           d dl mZ d dlmZmZmZ d dlmZ d dlm	Z	m
Z
 d dlmZ defdZdefd	Zd
ede
deded         fdZdS )    )Literal)ASMInstructionEffectiveAddressOperand)Register)RegisterSizeInstructionEncodingFormat)	Tracebackeffective_addressc                 \    t          | j        t                    r| j        j        j        S d S N)
isinstancebaser   valuesize)r   s    R/media/seanl/Data/Files/Programming/Python/URCL/urclelf/./x86/encoding/getregrm.py#get_effective_address_register_sizer      s1    #((33 1 %+001 1    operandc                     t          | j        t                    r| j        j        j        S t          | j        t                    rt          | j                  S d S r   )r   r   r   r   r   r   )r   s    r   get_operand_register_sizer      sN    '-** }"''	GM#3	4	4 27=AAAtr   instructionencodingdirection_bitbits)    @   c                    g }t          |j                  D ]\  }}t          |t                    r| j        |         }t          |j        t                    rt          |          |j        k    rV|dk    rt          |          dk    r|j        dk    s2t          j
        d| d|j         dt          |           d          c S |                    |j                   t          |j        t                    r|                    |j                   t          j
        d          c S |sd S t          |          dk    rd |d	         }	}d |d	         fS t          |          d
k    r$|r|d	         |d         }	}n%|d         |d	         }	}nt          j
        d          S t          |t                    rt          j
        d          S t          |	t                    r1|	j        r)|	j        j        j        dk    rt          j
        d          S n5|j        j        |	j        j        k    rt          j
        d| d|	 d          S ||	fS )Nr   r   z(Invalid register size for operand index z: expected z bits, found .z@Expected register or memory operand, found an immediate instead.   r      z,There are too many register/memory operands.z&r/m field can only contain a register.z*Only 32 bit memory is currently supported.z	Register z and z are not the same size.)	enumeratepermitted_operandsr   r   operandsr   r   r   r   r
   newappendr   lenr   )
r   r   r   r   r$   indexoperand_formatr   regrms
             r   get_regrm_operandsr,      s   68%.x/J%K%K 	n 	n!E>.,77 n%.u5gmX66 	n099^=PPPZ^bdZdZd  jC  DK  jL  jL  PR  jR  jR  We  Wj  np  Wp  Wp(}  .rX]  .r  .rjxj}  .r  .r  Mf  gn  Mo  Mo  .r  .r  .r   s   s  s  s  sOOGM222/?@@ nOOGM222$=)lmmmmmn  	4x==AXa[C(1+&&]]a 5#A;R#A;R =!PQQQc+,, 	K=!IJJJb*++ 	Xw X7=%++$=)VWWWy~.. }%V%V%V2%V%V%VWWWBwr   N)typingr   x86.asmr   r   r   x86.registerr   x86.encoding.encodingsr   r	   errorr
   r   r   boolr,    r   r   <module>r4      s          = = = = = = = = = = ! ! ! ! ! ! J J J J J J J J      1;K 1 1 1 1w    0N 0>W 0hl 0t{  }C  uD 0 0 0 0 0 0r   